The growing trend of more functionality and smaller form factor for electronic components has resulted in a dramatic increase of electrical interconnect density in integrated circuits (intra-chip interconnect), electronic packages and circuit boards (inter-chip interconnect). Dielectric layers in electronic circuits are employed as capacitors or circuit boards/substrates. High dielectric constant materials normally have better heat dissipative capability than the low dielectric constant materials, and therefore make them ideal for power components at high frequencies, such as microwave frequencies. A high dielectric constant material also leads to a large interconnect capacitance, which has pros and cons. In order to reduce simultaneous switching noise (SSN), high dielectric constant substrates are required for power and ground planes. However, signal lines surrounded by high dielectric constant materials can cause an increase of cross-talk, dielectric loss, and propagation delay at high frequency transmission. The dielectric loss is a result of the hysterical loop which is worse for high dielectric constant material than for low constant dielectric material. The propagation delay is due to the fact that the wavelength of a signal becomes shorter when it propagates through a material with a higher dielectric constant
Transmission lines, including microstrip lines and strip lines, are important elements in microwave circuits. These lines not only provide interconnection between active and passive devices but also are utilized as an impedance matching element for the circuits. A microstrip line is a conductor trace routed as the top or bottom layer for example of a circuit board. A strip line is a conductor trace routed on the inside layer for example of a circuit board. The impedance of a transmission line is proportional to dielectric constants of surrounding materials and trace height, and inversely proportional to trace width and trace thickness. As the effective dielectric constant of a strip line is higher than that of a microstrip line, less dielectric loss can be achieved in a microstrip line than in a strip line. In order to better control the impedance matching of transmission lines in microwave circuits, low dielectric constant materials are therefore desired.
In general, low dielectric constant materials are adopted for high speed and low loss transmission of signals but their poor heat dissipative capability may result in excessive heat and temperature. If a whole circuit is built on either a low or a high dielectric constant material, the circuit will then suffer heat dissipation and impedance matching problems or dielectric loss and propagation delay problems. In order to take advantage of their different material properties, both high and low dielectric constants materials must be chosen in different areas of a circuit board/substrate to meet specific requirements.
Several techniques based on the layout of microstrip or strip line on the dielectric material have been developed to reduce the dissipation loss in microwave circuit applications. In U.S. Pat. No. 5,753,968, Bahl et al disclosed an off-chip interconnect scheme, wherein an add-on layer 101 of dielectric material between a strip conductor 103 and a substrate 102 is used to reduce the dissipation loss in monolithic microwave integrated circuits as shown in FIG. 1. The dielectric constant of the add-on layer 101 is less than that of the substrate 102. The add-on dielectric layer 101 is disposed on top of the substrate 102 and placed at a different level (non-coplanar) from the substrate 102. It is often formed by bonding a layer of low dielectric material onto the high dielectric substrate 102 using a conventional lamination method, and then followed by photolithographic and etching processes to define the circuit pattern. The yield is usually low. In this case, a whole layer of material is consumed just to meet one specific requirement. Therefore, the cost is high. Furthermore, the surface topology is rough and not good for subsequent manufacturing processes.
In U.S. Pat. No. 5,604,017, Frankosky proposed a multi-dielectric laminate taking the advantage of both high and low dielectric material properties for off-chip interconnect layout of high frequency transmission circuits. The multi-dielectric laminate comprises a common conductor overlying materials having different dielectric constants laminated onto one continuous ground plane. By employing the continuous conductor and ground plane, it eliminates the need for constant impedance devices or conductor jumpers, and the top surface of the conductor may be printed and etched as a continuous piece, with allowances for the constant impedance lines across each dielectric.
According to International Patent Publication WO 2004/079797, a high speed interconnect system was proposed for both on-chip and off-chip interconnects to reduce the microwave loss and the signal propagation delay. For on-chip interconnects, the signal lines 201 laid on the oxide or dielectric material 202 connect the high-speed electronics devices (not shown) on a semiconductor substrate 204. For off-chip interconnects in a PCB, opened trenches or slots 203 are used to reduce the microwave loss of high-speed chips, as shown in FIG. 2. The trenches or slots may be filled with air or low dielectric material. The trench or slot does not go all the way through the dielectric layer. The manufacturing process is difficult and the depth of trench or slot is hard to precisely control.